33 lines
975 B
Diff
33 lines
975 B
Diff
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From: Prasad J Pandit <address@hidden>
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The AMD PC-Net II emulator has set of control and status(CSR)
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registers. Of these, CSR76 and CSR78 hold receive and transmit
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descriptor ring length respectively. This ring length could range
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from 1 to 65535. Setting ring length to zero leads to an infinite
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loop in pcnet_rdra_addr. Add check to avoid it.
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Reported-by: Li Qiang <address@hidden>
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Signed-off-by: Prasad J Pandit <address@hidden>
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---
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hw/net/pcnet.c | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/hw/net/pcnet.c b/hw/net/pcnet.c
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index 198a01f..3078de8 100644
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--- a/hw/net/pcnet.c
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+++ b/hw/net/pcnet.c
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@@ -1429,8 +1429,11 @@ static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value)
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case 47: /* POLLINT */
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case 72:
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case 74:
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+ break;
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case 76: /* RCVRL */
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case 78: /* XMTRL */
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+ val = (val > 0) ? val : 512;
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+ break;
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case 112:
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if (CSR_STOP(s) || CSR_SPND(s))
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break;
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--
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2.5.5
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